Silicon photonic terabit/s network-on-chip for datacenter interconnection

The demand of fast, reliable, and low-cost optical data links has led to research in developing the next generation of photonic integrated circuits (PICs) to improve the power efficiency, latency, and capacity. In past decade, the power required for photonic transmission in data centers and supercomputers has been dramatically reduced in energy per bit. The transmitter size per capacity has been reduced by a factor of 10-100, and in the same time the bandwidth capacity has been increased from 10 Gb/s to 400 Gb/s in short links. However, the typical energy consumption of 10-100 pJ/bit to date must shrink further by another 2 to 3 orders of magnitude within the next few years for practical optical interconnection applications [1, 2]. This demand can be achieved with complete integration with a high bandwidth density, low power module, and most importantly a low-cost package technique.